Semiconductor integrated circuits have advanced speed and power consumption reduction based on device scaling. In our unit, we are conducting research on 3D integration of FETs, thermoelectric elements, and devices using 2D materials, aiming for further miniaturization and higher performance. In particular, FETs using transition metal dichalcogenides, which are atomic layered materials, are attracting attention at academic societies as materials that can maintain high performance even if the generation is 2 nm or less. In addition to these research activities, we are operating three consortiums, the Integrated Green-niX Research and Human Resource Development Center, Industry-University Consortium for the Integrated Systems and Materials, and the EISESiV Consortium, under a Keep-neutral scheme that maximizes mutual collaboration and cooperation.

Research Unit Leader:
Prof. Hitoshi Wakabayashi,
Integrated Green-niX⁺ Research Unit,
Institute of Integrated Research (IIR),
Institute of Science Tokyo
He is the Leader and Professor of Integrated Green-niX⁺ Research Unit, Institute of Innovative Research, Tokyo Institute of Technology (Tokyo Tech). He has joined the Tokyo Tech since 2013 after NEC Corp., MIT and Sony Corp. He also serves as the Research Supervisor of JST-PRESTO on Information Carriers and Their Integrated Materials/Devices/Systems, the Deputy Leader of Device Technology Division, Leading-edge Semiconductor Technology Center (LSTC), and Associate Member of Science Council of Japan. He had served as the Director of Research Institute for the Earth Inclusive Sensing (2018-2022) and the Member of the Education and Research Council (2022-2023) in Tokyo Tech. He had also engaged in the Research Representative at JST-CREST, the Directors of JSAP (2019-2020), JIEP (2019-2020) and Japan MOT Society since 2019. He had served as the Chairs in Symposium on VLSI Technology 2013, IEEE/EDTM 2018, IEEE/IWJT (2017/2019/2021/2023) and IEEE/EDS/VLSI Technology & Circuits Committee (2020-2022).